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processor memory via acia
The Amélie project
Components - Memory

The memory is split into three distinct sections, as can be seen in the memory map :

    • Read/write memory (RAM)
      Because we don't want the hassles associated with refreshing dynamic parts, I have chosen to go for a 2K static RAM. This provides us with 2048 bytes of memory.
      The first 768 bytes are claimed by Page Zero, the processor stack, and the serial buffering.
      The next 256 bytes is reserved for the application code to use as it sees fit.
      The remaining 1024 bytes are, currently, unallocated. They can be used by the application if larger data storage requirements are necessary. There is a thought of having code able to be 'downloaded' into it, and a branch into the first location - perhaps to test developing code without the need to burn EPROMs, but this is unlikely to be implemented in the first versions of Amélie .
       
    • I/O
      The Input/Output devices are memory-mapped, so reading and writing bytes in the memory map will read and write registers in the hardware devices; the 6522 VIA , the 6551 ACIA, and the latch.
       
    • Read-only memory (ROM)
      For our purposes, we shall be comitting the application code and the BIOS into a single 8K EPROM. Within Amélie , the application and the BIOS are logically considered separate, and should be thought of as two distinct blocks. Practically, this is nonsense, it is so much easier to include the two parts within the one EPROM. Smaller component count, less address decoding...
      It also allows greater flexibility if you wish to jiggle the BIOS to sacrifice functionality (say a ˝Kb BIOS) for a larger application (say 3˝Kb!).

 Earlier versions of Amélie were specified with a 4K EPROM,
however it turns out that not only do I have more 8K ones,
but apparently 8K ones are generally more common.
Thanks to some foresight on my part :-) the memory decode
circuit will cater for this, so all that needs to be done to
affect this change, essentially, is to drop in an 8K EPROM!

For information on the address decoding logic, please refer to the memory map document.

© 2007 Rick Murray