ORR

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==ORR[S]==
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==ORR[S] : bitwise OR==
 
ORR will perform a logical, bitwise, '''''OR''''' between the two operands, placing the result in the destination register; this is useful for setting certain bits. Operand 1 is a [[Registers|register]], operand 2 can be a register, [[Shifts|shifted register]], or an immediate value (which may be [[Shifts|shifted]].
 
ORR will perform a logical, bitwise, '''''OR''''' between the two operands, placing the result in the destination register; this is useful for setting certain bits. Operand 1 is a [[Registers|register]], operand 2 can be a register, [[Shifts|shifted register]], or an immediate value (which may be [[Shifts|shifted]].
 
If the S bit is set ('''''ORRS'''''), the N and Z flags are set according to the result, the C flag is set according to the shift (if used), and the V flag remains unaltered.
 
If the S bit is set ('''''ORRS'''''), the N and Z flags are set according to the result, the C flag is set according to the shift (if used), and the V flag remains unaltered.

Latest revision as of 07:05, 22 December 2011

ORR
Instruction ORR[S]
Function Logically OR two values
Category Data processing
ARM family All
Notes -

Contents

[edit] ORR[S] : bitwise OR

ORR will perform a logical, bitwise, OR between the two operands, placing the result in the destination register; this is useful for setting certain bits. Operand 1 is a register, operand 2 can be a register, shifted register, or an immediate value (which may be shifted. If the S bit is set (ORRS), the N and Z flags are set according to the result, the C flag is set according to the shift (if used), and the V flag remains unaltered.

ORR is useful for setting bits in a bitfield. For each bit, ORRing with 1 will set the bit, and ORRing with 0 will leave it as it was.

[edit] Syntax

  ORR<suffix>  <dest>, <op 1>, <op 2>

[edit] Function

  dest = op_1 OR op_2

ORR sets the result bit upon both of the input bits being the same.

Truth table:

op_1 bit op_2 bit Result bit
0 0 0
0 1 1
1 0 1
1 1 1

[edit] Example

  ORR  R0, R0, #3  ; Set bits zero and one of R0.

[edit] Technical

The instruction bit pattern is as follows:

31 - 28 27 26 25 24 - 21 20 19 - 16 15 - 12 11 - 0
condition 0 0 I 1 1 0 0 S op_1 dest op_2/shift
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