|ARM family||All (except ARMv1)|
MUL is used to multiply registers (signed or unsigned) to create a 32 bit result. Operand 2 is multiplied by operand 3, and the result is stored in operand 1. All operands are registers.
If the S bit is specified, the flags are N, Z, and C flags are updated as follows: N is the result bit 31, Z is set if the result is zero, and C is undefined. V is not updated.
There is also a Multiply with Accumulate instruction for multiplying with addition.
MUL <op 1>, <op 2>, <op 3>
op_1 = op_2 × op_3
MOV R1, #5 MOV R2, #3 MUL R0, R1, R2 ; R0 now equals 15
- You cannot specify R15 for any of the operands.
- Having operand 1 and operand 2 be the same register is unpredicable, thus, for example, the following cannot be used:
MUL R0, R0, R1 ; try R0, R1, R0
- MUL provides the lower 32 bits of a 64 bit product, therefore the result is the same for both signed and unsigned values.
The instruction bit pattern is as follows:
|31 - 28||27 - 21||20||19 - 16||15 - 12||11 - 8||7 - 4||3 - 0|
|condition||0 0 0 0 0 0 0||S||op_1||0 0 0 0||op_3||1 0 0 1||op_2|