# MLA

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− | ==MLA== | + | ==MLA : Multiply Accumulate== |

MLA is used to multiply registers (signed or unsigned) to create a 32 bit result, which is then added to another value, which produces the final result.<br> | MLA is used to multiply registers (signed or unsigned) to create a 32 bit result, which is then added to another value, which produces the final result.<br> | ||

Operand 2 is multiplied by operand 3, the value of operand 4 is added, and the result is stored in operand 1. ''All'' operands are [[Registers|registers]]. | Operand 2 is multiplied by operand 3, the value of operand 4 is added, and the result is stored in operand 1. ''All'' operands are [[Registers|registers]]. |

## Latest revision as of 08:02, 22 December 2011

Instruction | MLA |
---|---|

Function | Multiply Accumulate |

Category | Multiply |

ARM family | All (except ARMv1) |

Notes | - |

## Contents |

## [edit] MLA : Multiply Accumulate

MLA is used to multiply registers (signed or unsigned) to create a 32 bit result, which is then added to another value, which produces the final result.

Operand 2 is multiplied by operand 3, the value of operand 4 is added, and the result is stored in operand 1. *All* operands are registers.

If the S bit is specified, the flags are N, Z, and C flags are updated as follows: N is the result bit 31, Z is set if the result is zero, and C is undefined. V is not updated.

There is also a Multiply instruction for basic multiplication.

### [edit] Syntax

MLA <op 1>, <op 2>, <op 3>, <op 4>

### [edit] Function

op_1 = (op_2 × op_3) + op_4

### [edit] Example

MOV R1, #5 MOV R2, #3 MOV R3, #18 MLA R0, R1, R2, R3 ; R0 now equals 33

### [edit] Restrictions

- You cannot specify R15 for any of the operands.
- Having operand 1 and operand 2 be the same register is unpredicable, thus, for example, the following cannot be used:

MLA R0, R0, R1, R2

- MLA provides the lower 32 bits of a 64 bit product, therefore the result is the same for both signed and unsigned values.

### [edit] Technical

The instruction bit pattern is as follows:

31 - 28 | 27 - 21 | 20 | 19 - 16 | 15 - 12 | 11 - 8 | 7 - 4 | 3 - 0 |
---|---|---|---|---|---|---|---|

condition | 0 0 0 0 0 0 1 | S | op_1 | op_4 | op_3 | 1 0 0 1 | op_2 |