EOR

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==EOR[S]==
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==EOR[S] : bitwise Exclusive OR==
 
EOR will perform a logical, bitwise, '''''Exclusive OR''''' between the two operands, placing the result in the destination register; this is useful for inverting certain bits. Operand 1 is a [[Registers|register]], operand 2 can be a register, [[Shifts|shifted register]], or an immediate value (which may be [[Shifts|shifted]].
 
EOR will perform a logical, bitwise, '''''Exclusive OR''''' between the two operands, placing the result in the destination register; this is useful for inverting certain bits. Operand 1 is a [[Registers|register]], operand 2 can be a register, [[Shifts|shifted register]], or an immediate value (which may be [[Shifts|shifted]].
 
If the S bit is set ('''''ANDS'''''), the N and Z flags are set according to the result, the C flag is set according to the shift (if used), and the V flag remains unaltered.
 
If the S bit is set ('''''ANDS'''''), the N and Z flags are set according to the result, the C flag is set according to the shift (if used), and the V flag remains unaltered.

Latest revision as of 07:01, 22 December 2011

EOR
Instruction EOR[S]
Function Logically Exclusive OR two values
Category Data processing
ARM family All
Notes -

Contents

[edit] EOR[S] : bitwise Exclusive OR

EOR will perform a logical, bitwise, Exclusive OR between the two operands, placing the result in the destination register; this is useful for inverting certain bits. Operand 1 is a register, operand 2 can be a register, shifted register, or an immediate value (which may be shifted. If the S bit is set (ANDS), the N and Z flags are set according to the result, the C flag is set according to the shift (if used), and the V flag remains unaltered.

EOR is useful for inverting bits in a bitfield. For each bit, EORing with 1 will invert the bit, and EORing with 0 will leave it as it was.

This instruction is the same as the one called XOR on some other platforms.

[edit] Syntax

  EOR<suffix>  <dest>, <op 1>, <op 2>

[edit] Function

  dest = op_1 EOR op_2

EOR sets the result bit upon either, but not both of the input bits being the same.

Truth table:

op_1 bit op_2 bit Result bit
0 0 0
0 1 1
1 0 1
1 1 0

[edit] Example

  EOR  R0, R0, #3  ; Invert bits zero and one of R0.
  EORS R0, R0, #3  ; As above, but also updates status flags

[edit] Technical

The instruction bit pattern is as follows:

31 - 28 27 26 25 24 - 21 20 19 - 16 15 - 12 11 - 0
condition 0 0 I 0 0 0 1 S op_1 dest op_2/shift

Note: If the I bit is zero, and bits 4 and 7 are both one (with bits 5,6 zero), the instruction is MLA, not EOR.

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