ADD will add two values.
If the S bit is set (ADDS), the N and Z flags are set according to the result, and the C and V flags are set as follows: C if the result generated a carry (unsigned overflow); V if the result generated a signed overflow.
ADD is useful for basic addition. Use ADC to perform addition with the Carry flag considered.
ADD<suffix> <dest>, <op 1>, <op 2>
dest = op_1 + op_2
ADD R0, R0, R1 ; Adds R1 to R0 ADD R0, R0, #1 ; Increment R0 by one
The instruction bit pattern is as follows:
|31 - 28||27||26||25||24 - 21||20||19 - 16||15 - 12||11 - 0|
|condition||0||0||I||0 1 0 0||S||op_1||dest||op_2/shift|
Note: If the I bit is zero, and bits 4 and 7 are both one (with bits 5,6 zero), the instruction is UMULL, not ADD.