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  • \ Turn off all interrupts, because RISC OS won't be expecting 32 bit mode! \ Turn interrupts back on again.
    9 KB (1,425 words) - 18:27, 18 December 2012
  • ...sibly inspired by the 6502s IRQ/NMI behaviour, the ARM offers IRQ (regular interrupts) and FIQ (fast interrupt). FIQs can interrupt IRQs, and are used in cases w
    15 KB (2,614 words) - 02:44, 5 December 2011
  • *'''I''': when set, disables IRQ interrupts *'''F''': when set, disables FIQ interrupts
    14 KB (2,274 words) - 19:07, 11 January 2016
  • *Interrupt controller capable of up to 30 maskable interrupts with 16 levels of priority. ...' budget lemonade because people that don't drink alcohol (and talk about "interrupts") just aren't ''manly'' enough. And then they wonder why their clientelle d
    9 KB (1,526 words) - 02:29, 5 December 2011
  • ... 26 bit modes, to write values to R15 status bits. For example, to disable interrupts (while preserving other registers), you would:
    2 KB (333 words) - 06:08, 22 December 2011
  • ...pt, and there is this, the ''fast interrupt''. The difference is that fast interrupts can interrupt regular ones. ... other, regular, interrupt mode. Only R13, R14, and CPSR are shadowed. All interrupts that don't require extreme speed (clock ticks, screen VSync, keyboard, etc.
    9 KB (1,561 words) - 01:02, 16 January 2012
  • ...tiple memory accesses on ARM v6+ are ''not guaranteed atomic''. This means interrupts can occur between the accesses; plus data aborts can occur with either part
    5 KB (849 words) - 14:55, 9 December 2012

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